The UART is a standard 2-pin serial interface that can communicate with the most similar interfaces at a fixed baud rate. Although the UART operates independently of the CPU, data transfers are blocking operations which will generate CPU wait states until the data transfer is completed.
UART control registers¶
The behaviour of the UART can be modified by changing values in the registers described below.
The entire 32bit word encodes the number of CPU core cycles to divide down to get the UART data bit rate (baud rate). The default value is 1.
For example, if the external crystal is 12.5 MHz, then the core CPU clock runs at 100 MHz. To get 9600 baud rate, you need to set:
100 000 000 / 9600 = 10417 (0x28B1)
Writing a value to this register will immediately start a data transfer on the SER_TX pin. If the UART write operation is pending, then the CPU will be blocked with wait states until the transfer is complete before starting the new write operation. This makes the UART transmit a relatively expensive operation on the CPU, but avoids the necessity of buffering data and checking for buffer overflow.
Reading a value from this register:
255 (0xff)if no valid data byte is in the receive buffer (the whole register has value
returns the value of the received buffer otherwise, and
clears the receive buffer for additional reads.
There is no FIFO associated with the UART.
The UART must be enabled to run (disabled by default).